Logic Synthesis for VLSI-Based Combined Finite State Machines Alexander Barkalov
171,19 €
Titel: Logic Synthesis for VLSI-Based Combined Finite State Machines, Untertitel: Synthesis Targeting ASICs, CPLDs and FPGAs, Einband: Buch, Autor: Alexander Barkalov, Verlag: Springer International Publishing, Springer International Publishing, Sprache: Englisch, Seiten: 308, Maße: 241x160x22 mm, Gewicht: 685 g, Verkäufer: buch-mimpf, Schlagworte: ASIC CPLD Combined Finite State Machine Embedded Memory Block Expansion of Code Space FPGA Graph-scheme of Algorithms Hardware Reduction Logic synthesis Look-up Table Element Pseudoequivalent States State Assignment State Codes Transformation Structural Decomposition Twofold State Assignment VLSI.
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